1. Field of the Invention
This invention relates to the termination of signal traces of a Printed Circuit Board (PCB), and more particularly to systems and methods of optimizing signal integrity through automated adjustment and testing of various combinations of termination component values.
2. Description of the Related Technology
Advances in integrated circuit (IC) manufacturing design have allowed PCB designers to integrate tremendous numbers of various ICs onto a PCB. For example, modern PCBs often have a large number of ICs in addition to hundreds of other discrete components. When designing digital circuits, especially those operating at higher speeds, engineers have to take into consideration many environmental variables inherent in the components and their interconnection with the PCB in order to reduce signal degradation between components of the PCB.
PCB's may comprise multiple layers of thin copper etched to form paths that carry signals from component(s) to component(s). At high signal rates, these paths start to have non-negligible impedances that can affect the circuit functionality. These parasitic impedances are normally inductive and mitigated using corrective resistive and capacitive loads called terminations, judiciously located on the PCB.
When the circuit turns into a distributed system, meaning that the PCB trace length exceeds one-sixth of the electrical length of a rising edge, for example, the PCB trace becomes a transmission line. An ideal transmission line will deliver the electrical signals from component to component without any loss or corruption. Non-ideal transmission lines may incur signal loss as the electrical signal travels through the length of the transmission line and a portion of the electrical signal is reflected towards other transmission lines. The reflected wave of the electrical signal combines with the reflective wave of the other electrical signals altering both wavers amplitude, modulation, and relative phase. To reduce electrical signal corruption, transmission lines may be coupled to terminations.
To minimize distortion of the transmitted digital data, transmission lines may be coupled to terminations on the PCB near the component(s). If the transmission line is not terminated with its characteristic impedance, the input impedance may exhibit inductive and/or capacitive characteristics depending on the nature of the load.
Termination design, which is typically a part of the PCB and layout design, is a fundamental and critical technique used to maintain signal integrity. It improves timing margin and mitigates Electro-Magnetic Interference (EMI) that creates noise and crosstalk. Proper terminations may also reduce overshoot and/or undershoot of electrical signal's, which are when the electrical signal voltage exceeds a high or low respective circuit power rail, which in turn increases the lifetime of the device.
Signal characterization is part of the test and verification process during the prototype PCB debugging stage. Verifying proper terminations is the process of measuring the effect of the timing margins, EMI effects, crosstalk, and/or other effects on the signal during the hardware PCB signal characterization stage. Circuits designed with poor signal integrity may not function within restricted ranges of inputs, temperature, and life expectancy, thus reducing the overall quality of the product, or the circuit may not work at all.
Signal characterization is a highly iterative process as the PCB layout is generated when the electronic design is complete. Since the electronic design might be affected by the PCB layout, the process of signal characterization may include a second or third PCB layout to fine-tune the electronic design. These iterations are very expensive, extremely wasteful, and very time consuming. Because PCBs may comprise hundreds, thousands, or more nets/traces per design, signal characterization is often performed only on selected critical signals. Thus, the integrity of signals on the non-characterized traces may not be verified in the design stage.
Current systems for characterizing a PCB include manually soldering and unsoldering discrete resistors and/or capacitors to the PCB and then testing the signal integrity of the PCB using a high speed digital oscilloscope and low impedance probes, for example. As those of skill in the art will recognize, however, manual soldering, unsoldering and testing using oscilloscopes does not always represent real world scenarios.
Also, as the throughput of a PCB is demanded to be higher and higher, the bus width typically gets wider and wider. Many PCB designs are required to terminate the whole data or address buses. If the bus is 32 bits or 64 bits wide or higher, it may create challenges to terminate the bus on the PCB. For example, the PCB may not have real estate to place a multitude of termination components and so the traces must be constrained to meet the layout requirements.
In addition, it has always been highly troublesome or even impossible to terminate a point-to-multipoint bus, a bi-directional bus, or the combination of both. The topology of the PCB can vary greatly and terminating various bus topologies is a very long, enduring task, involving multiple iterations of adjusting terminations and testing signal integrity on the PCB.
Accordingly, there is a need for systems and methods of automating signal integrity testing in order to optimize the termination layout on a multi-chip PCB.